1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device having a semiconductor element using a non-single crystal semiconductor layer.
2. Description of the Related Art
Currently, thinning of various devices such as wireless chips and sensors is a very important factor to achieve miniaturization of products, and the thinning technique and the application range of the miniaturized products spread rapidly. Such a variety of thinned devices are flexible to some extent and thus they can be installed to an object having a curved surface.
Therefore, a technique of manufacturing a semiconductor device has been proposed, in which an element layer including a thin film transistor formed over a glass substrate is separated from the substrate and transferred to another substrate, for example, a plastic film or the like.
The present applicant has proposed the techniques of separation and transfer, which are mentioned in Reference 1 (Japanese Published Patent Application No. H8-288522) and Reference 2 (Japanese Published Patent Application No. H8-250745). In Reference 1, a technique is described in which separation is performed by removing a silicon oxide layer, which is to be a separation layer, by wet etching. In Reference 2, a technique is described in which separation is performed by removing a silicon layer, which is to be a separation layer, by dry etching.
Further, the present applicant proposed techniques of separation and transfer, which is mentioned in Reference 3 (Japanese Published Patent Application No. 2003-174153). In Reference 3, a technique is described in which a metal layer (Ti, Al, Ta, W, Mo, Cu, Cr, Nd, Fe, Ni, Co, Ru, Rh, Pd, Os, or Ir) is formed over a substrate. This reference further discloses that, in the formation of an oxide layer over the metal layer, a metal oxide layer formed of the metal layer is formed at the interface between the metal layer and the oxide layer. According to this reference, the separation in a subsequent step is performed utilizing the metal oxide layer.
In Reference 4 (Japanese Published Patent Application No. 2004-78991), a semiconductor device is disclosed in which, a semiconductor chip with the size of less than or equal to 0.5 mm is embedded in paper or a film-like medium, so that tolerance for bending and concentrated loading is improved.